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[求助] 请大神帮忙看看TTL信息,刷了几个Breed都启动不了!

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[LV.5]常住居民I

发表于 2018-5-10 18:18 |显示全部楼层
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本帖最后由 wyelong 于 2018-5-10 18:24 编辑

一个MT7621的路由,没有对应的breed,刷了其他的breed,用编程器刷的,刷了多个都不能启动,
请大神们看看TTL信息,看看那个breed合适,是原版固件的TTL信息,还有帮忙看看是DDR2还是DDR3的内存,容量多大!


alink HW NAT Module Enabled
check key success
wait_mu_ready[204]mu is ready!
wps_init[401]wps gpio 12:0:0
wpsinit
wifi_init[436]wifi gpio 12:0:5
br-lan: port 1(eth0.1) entered forwarding state

===================================================================
                MT7621   stage1 code Mar 12 2015 14:43:30 (ASIC)
                CPU=500000000 HZ BUS=125000000 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x31100000
3PLL mode + External loopback
=XTAL 25Mhz but PLL set to C0005AB2=
=== XTAL-25Mhz xtal=25=== DDR-800Mhz ===
PLL3 FB_DL: 0xb, 1/0 = 555/469 2D000000
PLL2 FB_DL: 0xd, 1/0 = 575/449 35000000
PLL4 FB_DL: 0x12, 1/0 = 684/340 49000000
do DDR setting..[01F40000]
Apply DDR2 Setting...(use customer AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    1    1    1    1
0007:|    0    0    0    0    1    1    1    1    1    1    1    1    1    1    1    1
0008:|    1    1    1    1    1    1    1    1    1    1    1    1    0    0    0    0
0009:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0010:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0011:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
DRAMC_DQSCTL1[0e0]=1A000000
DRAMC_DQSGCTL[124]=80000000
rank 0 coarse = 8
rank 0 fine = 48
B:|    0    0    0    0    0    1    1    1    0    0    0    0    0    0    0    0
opt_dle value:6
DRAMC_DDR2CTL[07c]=40001263
DRAMC_PADCTL4[0e4]=00000005
DRAMC_DQIDLY1[210]=03040607
DRAMC_DQIDLY2[214]=00000303
DRAMC_DQIDLY3[218]=09050805
DRAMC_DQIDLY4[21c]=06040704
DRAMC_R0DELDLY[018]=00002B2B
==================================================================
                RX      DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    5 1 2 0 3 0 0 0 3 6
10 |    4 9 3 6 3 6
--------------------------------------

==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delayQS0 =43 DQS1 = 43
==================================================================
bit     DQS0     bit      DQS1
0  (1~81)41  8  (2~80)41
1  (1~76)38  9  (1~82)41
2  (1~81)41  10  (1~84)42
3  (1~80)40  11  (1~86)43
4  (1~86)43  12  (1~84)42
5  (2~78)40  13  (2~83)42
6  (1~86)43  14  (1~83)42
7  (1~86)43  15  (1~85)43
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    7 6 4 3 3 3 0 0 5 8
10 |    5 9 4 7 4 6
==================================================================
==================================================================
     TX  perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2
DQ loop=15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1
dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
DRAMC_DQODLY1[200]=88888888
DRAMC_DQODLY2[204]=88888888
20,data:88
[EMI] DRAMC calibration passed

===================================================================
                MT7621   stage1 code done
                CPU=500000000 HZ BUS=125000000 HZ
===================================================================


U-Boot 1.1.3 (Jul 12 2017 - 14:38:08)

Board: Ralink APSoC DRAM:  64 MB
relocate_code Pointer at: 83fb8000

Config XHCI 25M PLL
flash manufacture id: c2, device id 20 18
find flash: MX25L12805D
*** Warning - bad CRC, using default environment

============================================
Ralink UBoot Version: 4.3.3.0
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR2
DRAM bus: 16 bit
Xtal Mode=6 OCP Ratio=1/4
Flash component: SPI Flash
Date:Jul 12 2017  Time:14:38:08
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768

##### The CPU freq = 875 MHZ ####
estimate memory size =64 Mbytes
#Reset_MT7530
set LAN/WAN LLLLW

Please choose the operation:
   1: Load system code to SDRAM via TFTP.
   2: Load system code then write to Flash via TFTP.
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   7: Load Boot Loader code then write to Flash via Serial.
   9: Load Boot Loader code then write to Flash via TFTP.
default: 3
0

3: System Boot system code via Flash.
## Booting image at bc050000 ...
   Image Name:   ZJDX_MSG1500
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    1543773 Bytes =  1.5 MB
   Load Address: 80001000
   Entry Point:  80001000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 64

Starting kernel ...


LINUX started...

THIS IS ASIC
Linux version 3.10.14+ (root@wiair-desktop) (gcc version 4.8.3 (OpenWrt/Linaro GCC 4.8-2014.04 r13738) ) #83 Fri Aug 25 15:25:34 CST 2017

The CPU feqenuce set to 875 MHz
GCMP present
CPU0 revision is: 0001992f (MIPS 1004Kc)
Software DMA cache coherency
Determined physical RAM map:
memory: 04000000 @ 00000000 (usable)
Initrd not found or empty - disabling initrd
Zone ranges:
  Normal   [mem 0x00000000-0x03ffffff]
  HighMem  empty
Movable zone start for each node
Early memory node ranges
  node   0: [mem 0x00000000-0x03ffffff]
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 16256
Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock5 rootfstype=squashfs,jffs2
PID hash table entries: 256 (order: -2, 1024 bytes)
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Writing ErrCtl register=00007010
Readback ErrCtl register=00007010
Memory: 60152k/65536k available (3128k kernel code, 5384k reserved, 996k data, 220k init, 0k highmem)
NR_IRQS:128
console [ttyS1] enabled
Calibrating delay loop... 574.46 BogoMIPS (lpj=1148928)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
NET: Registered protocol family 16
release PCIe RST: RALINK_RSTCTRL = 7000000
PCIE PHY initialize
***** Xtal 25MHz *****
start MT7621 PCIe register access
RALINK_RSTCTRL = 7000000
RALINK_CLKCFG1 = 77ffeff8

*************** MT7621 PCIe RC mode *************
PCIE2 no card, disable it(RST&CLK)
pcie_link status = 0x3
RALINK_RSTCTRL= 3000000
*** Configure Device number setting of Virtual PCI-PCI bridge ***
RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
PCIE0 enabled
PCIE1 enabled
interrupt enable status: 300000
Port 1 N_FTS = 1b105000
Port 0 N_FTS = 1b105000
config reg done
init_rt2880pci done
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff]
pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
pci 0000:00:01.0: BAR 1: assigned [mem 0x60310000-0x6031ffff]
pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref]
pci 0000:00:00.0: PCI bridge to [bus 01]
pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
pci 0000:00:00.0:   bridge window [mem 0x60100000-0x601fffff pref]
pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff]
pci 0000:00:01.0: PCI bridge to [bus 02]
pci 0000:00:01.0:   bridge window [mem 0x60200000-0x602fffff]
PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
BAR0 at slot 0 = 0
bus=0x0, slot = 0x0
res[0]->start = 0
res[0]->end = 0
res[1]->start = 60300000
res[1]->end = 6030ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
BAR0 at slot 1 = 0
bus=0x0, slot = 0x1
res[0]->start = 0
res[0]->end = 0
res[1]->start = 60310000
res[1]->end = 6031ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x1, slot = 0x0, irq=0x4
res[0]->start = 60000000
res[0]->end = 600fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x2, slot = 0x1, irq=0x18
res[0]->start = 60200000
res[0]->end = 602fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
Switching to clocksource MIPS
NET: Registered protocol family 2
TCP established hash table entries: 512 (order: 0, 4096 bytes)
TCP bind hash table entries: 512 (order: -1, 2048 bytes)
TCP: Hash tables configured (established 512 bind 512)
TCP: reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
1 CPUs re-calibrate udelay(lpj = 1150976)
squashfs: version 4.0 (2009/01/31) Phillip Lougher
jffs2: version 2.2. (NAND) (SUMMARY)  (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
fuse init (API version 7.22)
msgmni has been set to 117
io scheduler noop registered (default)
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
Ralink gpio driver initialized
brd: module loaded
flash manufacture id: c2, device id 20 18
MX25L12805D(c2 2018c220) (16384 Kbytes)
mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
Creating 5 MTD partitions on "raspi":
0x000000000000-0x000001000000 : "ALL"
0x000000000000-0x000000030000 : "Bootloader"
0x000000030000-0x000000040000 : "Config"
0x000000040000-0x000000050000 : "Factory"
0x000000050000-0x000000ff0000 : "firmware"
0x0000001c8e9d-0x000000ff0000 : "rootfs"
mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
mtd: partition "rootfs_data" created automatically, ofs=0x540000, len=0xab0000
0x000000540000-0x000000ff0000 : "rootfs_data"
PPP generic driver version 2.4.2
PPP BSD Compression module registered
PPP Deflate Compression module registered
PPP MPPE Compression module registered
NET: Registered protocol family 24
rdm_major = 253
netif_napi_add() called with weight 128 on device eth0
GMAC1_MAC_ADRH -- : 0x0000c850
GMAC1_MAC_ADRL -- : 0xe917298a
Ralink APSoC Ethernet Driver Initilization. v3.1  512 rx/tx descriptors allocated, mtu = 1500!
NAPI enable, Tx Ring = 512, Rx Ring = 512
GMAC1_MAC_ADRH -- : 0x0000c850
GMAC1_MAC_ADRL -- : 0xe917298a
PROC INIT OK!
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
ehci-platform: EHCI generic platform driver
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
*****run project phy.
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
xhci-hcd xhci-hcd: xHCI Host Controller
xhci-hcd xhci-hcd: new USB bus registered, assigned bus number 1
xhci-hcd xhci-hcd: irq 22, io mem 0x1e1c0000
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 2 ports detected
xhci-hcd xhci-hcd: xHCI Host Controller
xhci-hcd xhci-hcd: new USB bus registered, assigned bus number 2
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
usbcore: registered new interface driver cdc_acm
cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
usbcore: registered new interface driver usb-storage
u32 classifier
nf_conntrack version 0.5.0 (939 buckets, 3756 max)
ip_tables: (C) 2000-2006 Netfilter Core Team
Type=Linux
----------------------------
--------igd inited----------
----------------------------
TCP: cubic registered
NET: Registered protocol family 10
NET: Registered protocol family 17
8021q: 802.1Q VLAN Support v1.8
registered taskstats version 1
VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
Freeing unused kernel memory: 220K (80409000 - 80440000)
procd: Console is alive
procd: - preinit -
Raeth v3.1 (NAPI
,SkbRecycle)

phy_tx_ring = 0x0347a000, tx_ring = 0xa347a000

phy_rx_ring0 = 0x0347c000, rx_ring0 = 0xa347c000
change HW-TRAP to 0x17ecf
set LAN/WAN LLLLW
GMAC1_MAC_ADRH -- : 0x0000c850
GMAC1_MAC_ADRL -- : 0xe917298a
CDMA_CSG_CFG = 81000000
GDMA1_FWD_CFG = 20710000
/etc/preinit: line 1: netmsg: not found
Press the [f] key and hit [enter] to enter failsafe mode
Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
kmod: ran 1 iterations
jffs2: notice: (318) jffs2_build_xattr_subsystem: complete building xattr subsystem, 9 of xdatum (1 unchecked, 8 orphan) and 14 of xref (0 dead, 8 orphan) found.
block: extroot: no root or overlay mount defined
jffs2 is ready
jffs2 is ready
jffs2: notice: (315) jffs2_build_xattr_subsystem: complete building xattr subsystem, 9 of xdatum (1 unchecked, 8 orphan) and 14 of xref (0 dead, 8 orphan) found.
switching to overlay
ra2880stop()...Done
Free TX/RX Ring Memory!
procd: - early -
procd: - ubus -
procd: - init -
Please press Enter to activate this console.
tntfs: module license 'Commercial. For support email ntfs-support@tuxera.com.' taints kernel.
Disabling lock debugging due to kernel taint
Tuxera NTFS driver 3015.1.29.evaluation [Flags: R/W MODULE].
Tuxera FAT 12/16/32 driver version 3015.1.29.evaluation [Flags: R/W MODULE].
Built against headers 3.10.14+ #329 Mon Jul 18 15:02:11 CST 2016 mips
Running on kernel 3.10.14+ #83 Fri Aug 25 15:25:34 CST 2017 mips
WARNING: Running kernel does not match configured kernel headers the driver was built with!  The driver needs to be rebuilt with the correct kernel headers!
Tuxera exFAT driver version 3015.8.24.evaluation [Flags: R/W MODULE].
Built against headers 3.10.14+ #329 Mon Jul 18 15:02:11 CST 2016 mips
Running on kernel 3.10.14+ #83 Fri Aug 25 15:25:34 CST 2017 mips
regiester url hooks finish
l7 inited
PPTP driver version 0.8.5
[IPC:00369]:ipc server success, path:/tmp/ipc_path_disk, sock:3
Raeth v3.1 (NAPI
,SkbRecycle)

phy_tx_ring = 0x0282a000, tx_ring = 0xa282a000

phy_rx_ring0 = 0x0282c000, rx_ring0 = 0xa282c000
change HW-TRAP to 0x17ecf
set LAN/WAN LLLLW
GMAC1_MAC_ADRH -- : 0x0000c850
GMAC1_MAC_ADRL -- : 0xe917298a
CDMA_CSG_CFG = 81000000
GDMA1_FWD_CFG = 20710000
device eth0.1 entered promiscuous mode
device eth0 entered promiscuous mode
-------->fdb_create, 470!!!
nl socket is null !
br-lan: port 1(eth0.1) entered forwarding state
br-lan: port 1(eth0.1) entered forwarding state
procd: - init complete -
efuse_probe: efuse = 10000002
tssi_1_target_pwr_g_band = 32
device ra0 entered promiscuous mode
br-lan: port 2(ra0) entered forwarding state
br-lan: port 2(ra0) entered forwarding state
device ra1 entered promiscuous mode
-------->fdb_create, 470!!!
nl socket is null !
device rai0 entered promiscuous mode
br-lan: port 4(rai0) entered forwarding state
br-lan: port 4(rai0) entered forwarding state
-------->fdb_create, 470!!!
nl socket is null !
device rai1 entered promiscuous mode
-------->fdb_create, 470!!!
nl socket is null !
Ralink HW NAT Module Enabled
check key success
wait_mu_ready[204]mu is ready!
wps_init[401]wps gpio 12:0:0
wpsinit
wifi_init[436]wifi gpio 12:0:5
br-lan: port 1(eth0.1) entered forwarding state
br-lan: port 2(ra0) entered forwarding state
procd: Instance log::instance1 s in a crash loop 6 crashes, 0 seconds since last crash
br-lan: port 4(rai0) entered forwarding state
main[81]:reset start
resetd_init[29]:flag:18
main[102]:reset_time: 30





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发表于 2018-5-10 18:35 |显示全部楼层
U-Boot 1.1.3 (Jul 12 2017 - 14:38:08)

Board: Ralink APSoC DRAM:  64 MB
relocate_code Pointer at: 83fb8000

Config XHCI 25M PLL
flash manufacture id: c2, device id 20 18
find flash: MX25L12805D
*** Warning - bad CRC, using default environment

============================================
Ralink UBoot Version: 4.3.3.0
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR2
DRAM bus: 16 bit
Xtal Mode=6 OCP Ratio=1/4
Flash component: SPI Flash
Date:Jul 12 2017  Time:14:38:08
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768

##### The CPU freq = 875 MHZ ####
estimate memory size =64 Mbytes
#Reset_MT7530
set LAN/WAN LLLLW

Please choose the operation:
   1: Load system code to SDRAM via TFTP.
   2: Load system code then write to Flash via TFTP.
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   7: Load Boot Loader code then write to Flash via Serial.
   9: Load Boot Loader code then write to Flash via TFTP.
default: 3
0
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发表于 2018-5-10 18:44 |显示全部楼层
whw5555 发表于 2018-5-10 18:35
U-Boot 1.1.3 (Jul 12 2017 - 14:38:08)

Board: Ralink APSoC DRAM:  64 MB

这里看到又像是ddr3的
===================================================================
                MT7621   stage1 code Mar 12 2015 14:43:30 (ASIC)
                CPU=500000000 HZ BUS=125000000 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x31100000
3PLL mode + External loopback
=XTAL 25Mhz but PLL set to C0005AB2=
=== XTAL-25Mhz xtal=25=== DDR-800Mhz ===
PLL3 FB_DL: 0xb, 1/0 = 555/469 2D000000
PLL2 FB_DL: 0xd, 1/0 = 575/449 35000000
PLL4 FB_DL: 0x12, 1/0 = 684/340 49000000
do DDR setting..[01F40000]
Apply DDR2 Setting...(use customer AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
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发表于 2018-5-10 18:52 |显示全部楼层
没有理解是breed不能进入还是breed下刷固件不启动,复位键不对应,可以使用ttl中断,刷固件不启动检查布局
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发表于 2018-5-10 18:56 |显示全部楼层
wyelong 发表于 2018-5-10 18:44
这里看到又像是ddr3的
===================================================================
        ...

方便的时候备份一下固件传我一份  598992345qq.com
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发表于 2018-5-10 18:58 |显示全部楼层
whw5555 发表于 2018-5-10 18:52
没有理解是breed不能进入还是breed下刷固件不启动,复位键不对应,可以使用ttl中断,刷固件不启动检查布局

用编程器单刷breed的,没有固件,一般能启动的话 直接就进入breed web的界面了!
给点思路 怎么检查布局
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发表于 2018-5-10 19:31 |显示全部楼层
试试这2个Breed,7621的



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发表于 2018-5-10 20:08 |显示全部楼层
本帖最后由 wyelong 于 2018-5-10 20:10 编辑
whw5555 发表于 2018-5-10 18:56
方便的时候备份一下固件传我一份  598992345qq.com

已发,注意查收,
你刷到其他路由看看怎么样!
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发表于 2018-5-10 20:12 |显示全部楼层
wyelong 发表于 2018-5-10 20:08
已发,注意查收,
你刷到其他路由看看怎么样!

谢谢 好的  我一会刷一下试试
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发表于 2018-5-10 20:23 |显示全部楼层
本帖最后由 a345464871 于 2018-5-10 20:36 编辑

MT7621
DDR2-800 64MB
这个帖子能救你:
http://www.rig删掉ht.com.cn/forum/thread-266077-1-1.html
也帮我顶顶和看看
http://forum.anywlan.com/thread-433160-1-1.html
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发表于 2018-5-10 20:27 |显示全部楼层
16/64的配置,一般般啊...
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发表于 2018-5-11 15:57 |显示全部楼层
学习下................
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